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13. 
Cover image for Machines, Computations, and Universality 5th International Conference, MCU 2007, Orleans, France, September 10-13, 2007, Proceedings
Machines, Computations, and Universality 5th International Conference, MCU 2007, Orleans, France, September 10-13, 2007, Proceedings
by 
Durand-Lose, Jérôme. editor.
https://doi.org/10.1007/978-3-540-74593-8
Format: 
Excerpt: 
Computer Science Logic and Foundations of Programming.
14. 
Cover image for Mikrocontroller und Mikroprozessoren
Mikrocontroller und Mikroprozessoren
by 
Ungerer, Theo. author.
https://doi.org/10.1007/978-3-540-46819-6
Format: 
Excerpt: 
Computer arithmetic and logic units.
15. 
Cover image for Fault-Tolerance Techniques for SRAM-Based FPGAs
Fault-Tolerance Techniques for SRAM-Based FPGAs
by 
Kastensmidt, Fernanda Lima. author.
https://doi.org/10.1007/978-0-387-31069-5
Format: 
Excerpt: 
Logic design.
16. 
Cover image for Computational Intelligence in Fault Diagnosis
Computational Intelligence in Fault Diagnosis
by 
Palade, Vasile. editor.
https://doi.org/10.1007/978-1-84628-631-5
Format: 
Excerpt: 
Logic design.
17. 
Cover image for Rechneraufbau und Rechnerarchitektur
Rechneraufbau und Rechnerarchitektur
by 
Böttcher, Axel. author.
https://doi.org/10.1007/3-540-44731-8
Format: 
Excerpt: 
Computer arithmetic and logic units.
18. 
Cover image for Correct Hardware Design and Verification Methods 13th IFIP WG 10.5Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings
Correct Hardware Design and Verification Methods 13th IFIP WG 10.5Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings
by 
Borrione, Dominique. editor.
https://doi.org/10.1007/11560548
Format: 
Excerpt: 
Computer Science Logic and Foundations of Programming.
19. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings
by 
Paliouras, Vassilis. editor.
https://doi.org/10.1007/11556930
Format: 
Excerpt: 
Computer arithmetic and logic units.
20. 
Cover image for Mikrorechner-Technik Übungen und Lösungen
Mikrorechner-Technik Übungen und Lösungen
by 
Bähring, Helmut. author.
https://doi.org/10.1007/b138234
Format: 
Excerpt: 
Computer arithmetic and logic units.