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1. 
Cover image for Design, Analysis and Test of Logic Circuits Under Uncertainty
Design, Analysis and Test of Logic Circuits Under Uncertainty
by 
Krishnaswamy, Smita. author.
https://doi.org/10.1007/978-90-481-9644-9
Format: 
Excerpt: 
Design, Analysis and Test of Logic Circuits Under Uncertainty Krishnaswamy, Smita. author.
2. 
Cover image for Computer Aided Verification 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012 Proceedings
Computer Aided Verification 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012 Proceedings
by 
Parthasarathy, Madhusudan. editor.
https://doi.org/10.1007/978-3-642-31424-7
Format: 
Excerpt: 
Computer Science Logic and Foundations of Programming.
3. 
Cover image for VLSI-SoC: The Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers
VLSI-SoC: The Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers
by 
Mir, Salvador. editor.
https://doi.org/10.1007/978-3-642-32770-4
Format: 
Excerpt: 
Logic design.
4. 
Cover image for Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedings
Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedings
by 
Das, Vinu V. editor.
https://doi.org/10.1007/978-3-642-20499-9
Format: 
Excerpt: 
Logic design.
5. 
Cover image for Power Electronics and Instrumentation Engineering International Conference, PEIE 2010,Kochi, Kerala, India, September 7-9, 2010, Proceedings
Power Electronics and Instrumentation Engineering International Conference, PEIE 2010,Kochi, Kerala, India, September 7-9, 2010, Proceedings
by 
Das, Vinu V. editor.
https://doi.org/10.1007/978-3-642-15739-4
Format: 
Excerpt: 
Logic design.
6. 
Cover image for Models in Hardware Testing Lecture Notes of the Forum in Honor of Christian Landrault
Models in Hardware Testing Lecture Notes of the Forum in Honor of Christian Landrault
by 
Wunderlich, Hans-Joachim. editor.
https://doi.org/10.1007/978-90-481-3282-9
Format: 
Excerpt: 
Computer Science Logic and Foundations of Programming.
7. 
Cover image for A Practical Introduction to Computer Architecture
A Practical Introduction to Computer Architecture
by 
Page, Daniel. author.
https://doi.org/10.1007/978-1-84882-256-6
Format: 
Excerpt: 
Computer arithmetic and logic units.
8. 
Cover image for Machines, Computations, and Universality 5th International Conference, MCU 2007, Orleans, France, September 10-13, 2007, Proceedings
Machines, Computations, and Universality 5th International Conference, MCU 2007, Orleans, France, September 10-13, 2007, Proceedings
by 
Durand-Lose, Jérôme. editor.
https://doi.org/10.1007/978-3-540-74593-8
Format: 
Excerpt: 
Computer Science Logic and Foundations of Programming.
9. 
Cover image for Rechneraufbau und Rechnerarchitektur
Rechneraufbau und Rechnerarchitektur
by 
Böttcher, Axel. author.
https://doi.org/10.1007/3-540-44731-8
Format: 
Excerpt: 
Computer arithmetic and logic units.
10. 
Cover image for Correct Hardware Design and Verification Methods 13th IFIP WG 10.5Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings
Correct Hardware Design and Verification Methods 13th IFIP WG 10.5Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedings
by 
Borrione, Dominique. editor.
https://doi.org/10.1007/11560548
Format: 
Excerpt: 
Computer Science Logic and Foundations of Programming.
11. 
Cover image for Mikrorechner-Technik Übungen und Lösungen
Mikrorechner-Technik Übungen und Lösungen
by 
Bähring, Helmut. author.
https://doi.org/10.1007/b138234
Format: 
Excerpt: 
Computer arithmetic and logic units.