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1. 
Cover image for Design, Analysis and Test of Logic Circuits Under Uncertainty
Design, Analysis and Test of Logic Circuits Under Uncertainty
by 
Krishnaswamy, Smita. author.
https://doi.org/10.1007/978-90-481-9644-9
Format: 
Excerpt: 
Design, Analysis and Test of Logic Circuits Under Uncertainty Krishnaswamy, Smita. author.
2. 
Cover image for Computer Engineering and Technology 17th National Conference, NCCET 2013, Xining, China, July 20-22, 2013. Revised Selected Papers
Computer Engineering and Technology 17th National Conference, NCCET 2013, Xining, China, July 20-22, 2013. Revised Selected Papers
by 
Xu, Weixia. editor.
https://doi.org/10.1007/978-3-642-41635-4
Format: 
Excerpt: 
Computer arithmetic and logic units.
3. 
Cover image for Computer Engineering and Technology 16th National Conference, NCCET 2012, Shanghai, China, August 17-19, 2012, Revised Selected Papers
Computer Engineering and Technology 16th National Conference, NCCET 2012, Shanghai, China, August 17-19, 2012, Revised Selected Papers
by 
Xu, Weixia. editor.
https://doi.org/10.1007/978-3-642-35898-2
Format: 
Excerpt: 
Computer arithmetic and logic units.
4. 
Cover image for VLSI-SoC: The Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers
VLSI-SoC: The Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers
by 
Mir, Salvador. editor.
https://doi.org/10.1007/978-3-642-32770-4
Format: 
Excerpt: 
Logic design.
5. 
Cover image for Models in Hardware Testing Lecture Notes of the Forum in Honor of Christian Landrault
Models in Hardware Testing Lecture Notes of the Forum in Honor of Christian Landrault
by 
Wunderlich, Hans-Joachim. editor.
https://doi.org/10.1007/978-90-481-3282-9
Format: 
Excerpt: 
Computer Science Logic and Foundations of Programming.
6. 
Cover image for Mikrocontroller und Mikroprozessoren
Mikrocontroller und Mikroprozessoren
by 
Ungerer, Theo. author.
https://doi.org/10.1007/978-3-642-05398-6
Format: 
Excerpt: 
Computer arithmetic and logic units.
7. 
Cover image for Job Scheduling Strategies for Parallel Processing 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009, Revised Papers
Job Scheduling Strategies for Parallel Processing 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009, Revised Papers
by 
Frachtenberg, Eitan. editor.
https://doi.org/10.1007/978-3-642-04633-9
Format: 
Excerpt: 
Logic design.
8. 
Cover image for Component-Based Software Engineering 12th International Symposium, CBSE 2009 East Stroudsburg, PA, USA, June 24-26, 2009 Proceedings
Component-Based Software Engineering 12th International Symposium, CBSE 2009 East Stroudsburg, PA, USA, June 24-26, 2009 Proceedings
by 
Lewis, Grace A. editor. (orcid)0000-0001-9128-9863
https://doi.org/10.1007/978-3-642-02414-6
Format: 
Excerpt: 
Computer Science Logic and Foundations of Programming.
9. 
Cover image for Mikrocontroller und Mikroprozessoren
Mikrocontroller und Mikroprozessoren
by 
Ungerer, Theo. author.
https://doi.org/10.1007/978-3-540-46819-6
Format: 
Excerpt: 
Computer arithmetic and logic units.
10. 
Cover image for Fault-Tolerance Techniques for SRAM-Based FPGAs
Fault-Tolerance Techniques for SRAM-Based FPGAs
by 
Kastensmidt, Fernanda Lima. author.
https://doi.org/10.1007/978-0-387-31069-5
Format: 
Excerpt: 
Logic design.
11. 
Cover image for Computational Intelligence in Fault Diagnosis
Computational Intelligence in Fault Diagnosis
by 
Palade, Vasile. editor.
https://doi.org/10.1007/978-1-84628-631-5
Format: 
Excerpt: 
Logic design.
12. 
Cover image for Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings
by 
Paliouras, Vassilis. editor.
https://doi.org/10.1007/11556930
Format: 
Excerpt: 
Computer arithmetic and logic units.