Search Results for Logic. - Narrowed by: Computers.SirsiDynix Enterprisehttp://librarycatalog.yyu.edu.tr/client/en_US/default/default/qu$003dLogic.$0026qf$003dSUBJECT$002509Subject$002509Computers.$002509Computers.$0026ps$003d300$0026isd$003dtrue?dt=list2025-02-13T15:49:01ZDesign, Analysis and Test of Logic Circuits Under Uncertaintyent://SD_ILS/0/SD_ILS:1644082025-02-13T15:49:01Z2025-02-13T15:49:01Zby Krishnaswamy, Smita. author.<br/><a href="https://doi.org/10.1007/978-90-481-9644-9">https://doi.org/10.1007/978-90-481-9644-9</a><br/>Format: Electronic Resources<br/>Computer Engineering and Technology 17th National Conference, NCCET 2013, Xining, China, July 20-22, 2013. Revised Selected Papersent://SD_ILS/0/SD_ILS:1474422025-02-13T15:49:01Z2025-02-13T15:49:01Zby Xu, Weixia. editor.<br/><a href="https://doi.org/10.1007/978-3-642-41635-4">https://doi.org/10.1007/978-3-642-41635-4</a><br/>Format: Electronic Resources<br/>Computer Engineering and Technology 16th National Conference, NCCET 2012, Shanghai, China, August 17-19, 2012, Revised Selected Papersent://SD_ILS/0/SD_ILS:1767352025-02-13T15:49:01Z2025-02-13T15:49:01Zby Xu, Weixia. editor.<br/><a href="https://doi.org/10.1007/978-3-642-35898-2">https://doi.org/10.1007/978-3-642-35898-2</a><br/>Format: Electronic Resources<br/>Computer Aided Verification 24th International Conference, CAV 2012, Berkeley, CA, USA, July 7-13, 2012 Proceedingsent://SD_ILS/0/SD_ILS:1493462025-02-13T15:49:01Z2025-02-13T15:49:01Zby Parthasarathy, Madhusudan. editor.<br/><a href="https://doi.org/10.1007/978-3-642-31424-7">https://doi.org/10.1007/978-3-642-31424-7</a><br/>Format: Electronic Resources<br/>VLSI-SoC: The Advanced Research for Systems on Chip 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papersent://SD_ILS/0/SD_ILS:1636702025-02-13T15:49:01Z2025-02-13T15:49:01Zby Mir, Salvador. editor.<br/><a href="https://doi.org/10.1007/978-3-642-32770-4">https://doi.org/10.1007/978-3-642-32770-4</a><br/>Format: Electronic Resources<br/>Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedingsent://SD_ILS/0/SD_ILS:1515902025-02-13T15:49:01Z2025-02-13T15:49:01Zby Das, Vinu V. editor.<br/><a href="https://doi.org/10.1007/978-3-642-20499-9">https://doi.org/10.1007/978-3-642-20499-9</a><br/>Format: Electronic Resources<br/>Power Electronics and Instrumentation Engineering International Conference, PEIE 2010,Kochi, Kerala, India, September 7-9, 2010, Proceedingsent://SD_ILS/0/SD_ILS:1750392025-02-13T15:49:01Z2025-02-13T15:49:01Zby Das, Vinu V. editor.<br/><a href="https://doi.org/10.1007/978-3-642-15739-4">https://doi.org/10.1007/978-3-642-15739-4</a><br/>Format: Electronic Resources<br/>Models in Hardware Testing Lecture Notes of the Forum in Honor of Christian Landraultent://SD_ILS/0/SD_ILS:1454972025-02-13T15:49:01Z2025-02-13T15:49:01Zby Wunderlich, Hans-Joachim. editor.<br/><a href="https://doi.org/10.1007/978-90-481-3282-9">https://doi.org/10.1007/978-90-481-3282-9</a><br/>Format: Electronic Resources<br/>Mikrocontroller und Mikroprozessorenent://SD_ILS/0/SD_ILS:1824752025-02-13T15:49:01Z2025-02-13T15:49:01Zby Ungerer, Theo. author.<br/><a href="https://doi.org/10.1007/978-3-642-05398-6">https://doi.org/10.1007/978-3-642-05398-6</a><br/>Format: Electronic Resources<br/>Job Scheduling Strategies for Parallel Processing 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009, Revised Papersent://SD_ILS/0/SD_ILS:1697972025-02-13T15:49:01Z2025-02-13T15:49:01Zby Frachtenberg, Eitan. editor.<br/><a href="https://doi.org/10.1007/978-3-642-04633-9">https://doi.org/10.1007/978-3-642-04633-9</a><br/>Format: Electronic Resources<br/>A Practical Introduction to Computer Architectureent://SD_ILS/0/SD_ILS:1387572025-02-13T15:49:01Z2025-02-13T15:49:01Zby Page, Daniel. author.<br/><a href="https://doi.org/10.1007/978-1-84882-256-6">https://doi.org/10.1007/978-1-84882-256-6</a><br/>Format: Electronic Resources<br/>Component-Based Software Engineering 12th International Symposium, CBSE 2009 East Stroudsburg, PA, USA, June 24-26, 2009 Proceedingsent://SD_ILS/0/SD_ILS:1429482025-02-13T15:49:01Z2025-02-13T15:49:01Zby Lewis, Grace A. editor. (orcid)0000-0001-9128-9863<br/><a href="https://doi.org/10.1007/978-3-642-02414-6">https://doi.org/10.1007/978-3-642-02414-6</a><br/>Format: Electronic Resources<br/>Machines, Computations, and Universality 5th International Conference, MCU 2007, Orleans, France, September 10-13, 2007, Proceedingsent://SD_ILS/0/SD_ILS:1694622025-02-13T15:49:01Z2025-02-13T15:49:01Zby Durand-Lose, Jérôme. editor.<br/><a href="https://doi.org/10.1007/978-3-540-74593-8">https://doi.org/10.1007/978-3-540-74593-8</a><br/>Format: Electronic Resources<br/>Mikrocontroller und Mikroprozessorenent://SD_ILS/0/SD_ILS:1784852025-02-13T15:49:01Z2025-02-13T15:49:01Zby Ungerer, Theo. author.<br/><a href="https://doi.org/10.1007/978-3-540-46819-6">https://doi.org/10.1007/978-3-540-46819-6</a><br/>Format: Electronic Resources<br/>Fault-Tolerance Techniques for SRAM-Based FPGAsent://SD_ILS/0/SD_ILS:1527042025-02-13T15:49:01Z2025-02-13T15:49:01Zby Kastensmidt, Fernanda Lima. author.<br/><a href="https://doi.org/10.1007/978-0-387-31069-5">https://doi.org/10.1007/978-0-387-31069-5</a><br/>Format: Electronic Resources<br/>Computational Intelligence in Fault Diagnosisent://SD_ILS/0/SD_ILS:1394982025-02-13T15:49:01Z2025-02-13T15:49:01Zby Palade, Vasile. editor.<br/><a href="https://doi.org/10.1007/978-1-84628-631-5">https://doi.org/10.1007/978-1-84628-631-5</a><br/>Format: Electronic Resources<br/>Rechneraufbau und Rechnerarchitekturent://SD_ILS/0/SD_ILS:1828302025-02-13T15:49:01Z2025-02-13T15:49:01Zby Böttcher, Axel. author.<br/><a href="https://doi.org/10.1007/3-540-44731-8">https://doi.org/10.1007/3-540-44731-8</a><br/>Format: Electronic Resources<br/>Correct Hardware Design and Verification Methods 13th IFIP WG 10.5Advanced Research, Working Conference, CHARME 2005, Saarbrücken, Germany, October 3-6, 2005, Proceedingsent://SD_ILS/0/SD_ILS:1708292025-02-13T15:49:01Z2025-02-13T15:49:01Zby Borrione, Dominique. editor.<br/><a href="https://doi.org/10.1007/11560548">https://doi.org/10.1007/11560548</a><br/>Format: Electronic Resources<br/>Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedingsent://SD_ILS/0/SD_ILS:1431572025-02-13T15:49:01Z2025-02-13T15:49:01Zby Paliouras, Vassilis. editor.<br/><a href="https://doi.org/10.1007/11556930">https://doi.org/10.1007/11556930</a><br/>Format: Electronic Resources<br/>Mikrorechner-Technik Übungen und Lösungenent://SD_ILS/0/SD_ILS:1911982025-02-13T15:49:01Z2025-02-13T15:49:01Zby Bähring, Helmut. author.<br/><a href="https://doi.org/10.1007/b138234">https://doi.org/10.1007/b138234</a><br/>Format: Electronic Resources<br/>