Search Results for Logic. - Narrowed by: Processor Architectures.SirsiDynix Enterprisehttp://librarycatalog.yyu.edu.tr/client/en_US/default/default/qu$003dLogic.$0026qf$003dSUBJECT$002509Subject$002509Processor$002bArchitectures.$002509Processor$002bArchitectures.$0026ps$003d300$0026isd$003dtrue?dt=list2025-02-13T14:56:31ZDisruptive Logic Architectures and Technologies From Device to System Levelent://SD_ILS/0/SD_ILS:1515062025-02-13T14:56:31Z2025-02-13T14:56:31Zby Gaillardon, Pierre-Emmanuel. author.<br/><a href="https://doi.org/10.1007/978-1-4614-3058-2">https://doi.org/10.1007/978-1-4614-3058-2</a><br/>Format: Electronic Resources<br/>Facing the Multicore-Challenge III Aspects of New Paradigms and Technologies in Parallel Computingent://SD_ILS/0/SD_ILS:1721162025-02-13T14:56:31Z2025-02-13T14:56:31Zby Keller, Rainer. editor.<br/><a href="https://doi.org/10.1007/978-3-642-35893-7">https://doi.org/10.1007/978-3-642-35893-7</a><br/>Format: Electronic Resources<br/>Computer Engineering and Technology 17th National Conference, NCCET 2013, Xining, China, July 20-22, 2013. Revised Selected Papersent://SD_ILS/0/SD_ILS:1474422025-02-13T14:56:31Z2025-02-13T14:56:31Zby Xu, Weixia. editor.<br/><a href="https://doi.org/10.1007/978-3-642-41635-4">https://doi.org/10.1007/978-3-642-41635-4</a><br/>Format: Electronic Resources<br/>Computer Engineering and Technology 16th National Conference, NCCET 2012, Shanghai, China, August 17-19, 2012, Revised Selected Papersent://SD_ILS/0/SD_ILS:1767352025-02-13T14:56:31Z2025-02-13T14:56:31Zby Xu, Weixia. editor.<br/><a href="https://doi.org/10.1007/978-3-642-35898-2">https://doi.org/10.1007/978-3-642-35898-2</a><br/>Format: Electronic Resources<br/>Transactions on High-Performance Embedded Architectures and Compilers IVent://SD_ILS/0/SD_ILS:1704822025-02-13T14:56:31Z2025-02-13T14:56:31Zby Stenström, Per. editor. (orcid)0000-0002-7441-8245<br/><a href="https://doi.org/10.1007/978-3-642-24568-8">https://doi.org/10.1007/978-3-642-24568-8</a><br/>Format: Electronic Resources<br/>Advances in Power Electronics and Instrumentation Engineering Second International Conference, PEIE 2011, Nagpur, Maharashtra, India, April 21-22, 2011. Proceedingsent://SD_ILS/0/SD_ILS:1515902025-02-13T14:56:31Z2025-02-13T14:56:31Zby Das, Vinu V. editor.<br/><a href="https://doi.org/10.1007/978-3-642-20499-9">https://doi.org/10.1007/978-3-642-20499-9</a><br/>Format: Electronic Resources<br/>Transactions on High-Performance Embedded Architectures and Compilers IIIent://SD_ILS/0/SD_ILS:1766732025-02-13T14:56:31Z2025-02-13T14:56:31Zby Stenström, Per. editor. (orcid)0000-0002-7441-8245<br/><a href="https://doi.org/10.1007/978-3-642-19448-1">https://doi.org/10.1007/978-3-642-19448-1</a><br/>Format: Electronic Resources<br/>Power Electronics and Instrumentation Engineering International Conference, PEIE 2010,Kochi, Kerala, India, September 7-9, 2010, Proceedingsent://SD_ILS/0/SD_ILS:1750392025-02-13T14:56:31Z2025-02-13T14:56:31Zby Das, Vinu V. editor.<br/><a href="https://doi.org/10.1007/978-3-642-15739-4">https://doi.org/10.1007/978-3-642-15739-4</a><br/>Format: Electronic Resources<br/>High Performance Embedded Architectures and Compilers 5th International Conference, HiPEAC 2010, Pisa, Italy, January 25-27, 2010, Proceedingsent://SD_ILS/0/SD_ILS:1459022025-02-13T14:56:31Z2025-02-13T14:56:31Zby Patt, Yale N. editor.<br/><a href="https://doi.org/10.1007/978-3-642-11515-8">https://doi.org/10.1007/978-3-642-11515-8</a><br/>Format: Electronic Resources<br/>Mikrocontroller und Mikroprozessorenent://SD_ILS/0/SD_ILS:1824752025-02-13T14:56:31Z2025-02-13T14:56:31Zby Ungerer, Theo. author.<br/><a href="https://doi.org/10.1007/978-3-642-05398-6">https://doi.org/10.1007/978-3-642-05398-6</a><br/>Format: Electronic Resources<br/>Anwendungsorientierte Mikroprozessoren Mikrocontroller und Digitale Signalprozessorenent://SD_ILS/0/SD_ILS:1851492025-02-13T14:56:31Z2025-02-13T14:56:31Zby Bähring, Helmut. author.<br/><a href="https://doi.org/10.1007/978-3-642-12292-7">https://doi.org/10.1007/978-3-642-12292-7</a><br/>Format: Electronic Resources<br/>Hybrid Systems: Computation and Control 12th International Conference, HSCC 2009, San Francisco, CA, USA, April 13-15, 2009, Proceedingsent://SD_ILS/0/SD_ILS:1702882025-02-13T14:56:31Z2025-02-13T14:56:31Zby Majumdar, Rupak. editor.<br/><a href="https://doi.org/10.1007/978-3-642-00602-9">https://doi.org/10.1007/978-3-642-00602-9</a><br/>Format: Electronic Resources<br/>Transactions on High-Performance Embedded Architectures and Compilers IIent://SD_ILS/0/SD_ILS:1721382025-02-13T14:56:31Z2025-02-13T14:56:31Zby Stenström, Per. editor. (orcid)0000-0002-7441-8245<br/><a href="https://doi.org/10.1007/978-3-642-00904-4">https://doi.org/10.1007/978-3-642-00904-4</a><br/>Format: Electronic Resources<br/>High Performance Embedded Architectures and Compilers Fourth International Conference, HiPEAC 2009ent://SD_ILS/0/SD_ILS:1516982025-02-13T14:56:31Z2025-02-13T14:56:31Zby Seznec, André. editor.<br/><a href="https://doi.org/10.1007/978-3-540-92990-1">https://doi.org/10.1007/978-3-540-92990-1</a><br/>Format: Electronic Resources<br/>Computer Performance Evaluation and Benchmarking SPEC Benchmark Workshop 2009, Austin, TX, USA, January 25, 2009, Proceedingsent://SD_ILS/0/SD_ILS:1479052025-02-13T14:56:31Z2025-02-13T14:56:31Zby Kaeli, David. editor.<br/><a href="https://doi.org/10.1007/978-3-540-93799-9">https://doi.org/10.1007/978-3-540-93799-9</a><br/>Format: Electronic Resources<br/>Job Scheduling Strategies for Parallel Processing 14th International Workshop, JSSPP 2009, Rome, Italy, May 29, 2009, Revised Papersent://SD_ILS/0/SD_ILS:1697972025-02-13T14:56:31Z2025-02-13T14:56:31Zby Frachtenberg, Eitan. editor.<br/><a href="https://doi.org/10.1007/978-3-642-04633-9">https://doi.org/10.1007/978-3-642-04633-9</a><br/>Format: Electronic Resources<br/>A Practical Introduction to Computer Architectureent://SD_ILS/0/SD_ILS:1387572025-02-13T14:56:31Z2025-02-13T14:56:31Zby Page, Daniel. author.<br/><a href="https://doi.org/10.1007/978-1-84882-256-6">https://doi.org/10.1007/978-1-84882-256-6</a><br/>Format: Electronic Resources<br/>Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, Revised Selected Papersent://SD_ILS/0/SD_ILS:1423482025-02-13T14:56:31Z2025-02-13T14:56:31Zby Svensson, Lars. editor.<br/><a href="https://doi.org/10.1007/978-3-540-95948-9">https://doi.org/10.1007/978-3-540-95948-9</a><br/>Format: Electronic Resources<br/>High Performance Embedded Architectures and Compilers Third International Conference, HiPEAC 2008, Göteborg, Sweden, January 27-29, 2008, Proceedingsent://SD_ILS/0/SD_ILS:1699222025-02-13T14:56:31Z2025-02-13T14:56:31Zby Stenström, Per. editor. (orcid)0000-0002-7441-8245<br/><a href="https://doi.org/10.1007/978-3-540-77560-7">https://doi.org/10.1007/978-3-540-77560-7</a><br/>Format: Electronic Resources<br/>Job Scheduling Strategies for Parallel Processing 13th International Workshop, JSSPP 2007, Seattle, WA, USA, June 17, 2007, Revised Papersent://SD_ILS/0/SD_ILS:1707232025-02-13T14:56:31Z2025-02-13T14:56:31Zby Frachtenberg, Eitan. editor.<br/><a href="https://doi.org/10.1007/978-3-540-78699-3">https://doi.org/10.1007/978-3-540-78699-3</a><br/>Format: Electronic Resources<br/>Hybrid Systems: Computation and Control 11th International Workshop, HSCC 2008, St. Louis, MO, USA, April 22-24, 2008, Proceedingsent://SD_ILS/0/SD_ILS:1709002025-02-13T14:56:31Z2025-02-13T14:56:31Zby Egerstedt, Magnus. editor.<br/><a href="https://doi.org/10.1007/978-3-540-78929-1">https://doi.org/10.1007/978-3-540-78929-1</a><br/>Format: Electronic Resources<br/>High-Level Synthesis from Algorithm to Digital Circuitent://SD_ILS/0/SD_ILS:1417722025-02-13T14:56:31Z2025-02-13T14:56:31Zby Coussy, Philippe. editor.<br/><a href="https://doi.org/10.1007/978-1-4020-8588-8">https://doi.org/10.1007/978-1-4020-8588-8</a><br/>Format: Electronic Resources<br/>Transactions on High-Performance Embedded Architectures and Compilers Ient://SD_ILS/0/SD_ILS:1705102025-02-13T14:56:31Z2025-02-13T14:56:31Zby O'Boyle, Mike. editor.<br/><a href="https://doi.org/10.1007/978-3-540-71528-3">https://doi.org/10.1007/978-3-540-71528-3</a><br/>Format: Electronic Resources<br/>Job Scheduling Strategies for Parallel Processing 12th International Workshop, JSSPP 2006, Saint-Malo, France, June 26, 2006, Revised Selected Papersent://SD_ILS/0/SD_ILS:1707982025-02-13T14:56:31Z2025-02-13T14:56:31Zby Frachtenberg, Eitan. editor.<br/><a href="https://doi.org/10.1007/978-3-540-71035-6">https://doi.org/10.1007/978-3-540-71035-6</a><br/>Format: Electronic Resources<br/>Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedingsent://SD_ILS/0/SD_ILS:1716812025-02-13T14:56:31Z2025-02-13T14:56:31Zby Azemard, Nadine. editor.<br/><a href="https://doi.org/10.1007/978-3-540-74442-9">https://doi.org/10.1007/978-3-540-74442-9</a><br/>Format: Electronic Resources<br/>Advances in Computer Systems Architecture 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedingsent://SD_ILS/0/SD_ILS:1709732025-02-13T14:56:31Z2025-02-13T14:56:31Zby Choi, Lynn. editor.<br/><a href="https://doi.org/10.1007/978-3-540-74309-5">https://doi.org/10.1007/978-3-540-74309-5</a><br/>Format: Electronic Resources<br/>Hybrid Systems: Computation and Control 10th International Workshop, HSCC 2007, Pisa, Italy, April 3-5, 2007, Proceedingsent://SD_ILS/0/SD_ILS:1505352025-02-13T14:56:31Z2025-02-13T14:56:31Zby Bemporad, Alberto. editor.<br/><a href="https://doi.org/10.1007/978-3-540-71493-4">https://doi.org/10.1007/978-3-540-71493-4</a><br/>Format: Electronic Resources<br/>High Performance Embedded Architectures and Compilers Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007. Proceedingsent://SD_ILS/0/SD_ILS:1694462025-02-13T14:56:31Z2025-02-13T14:56:31Zby De Bosschere, Koen. editor.<br/><a href="https://doi.org/10.1007/978-3-540-69338-3">https://doi.org/10.1007/978-3-540-69338-3</a><br/>Format: Electronic Resources<br/>Computer Aided Systems Theory - EUROCAST 2007 11th International Conference on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 12-16, 2007, Revised Selected Papersent://SD_ILS/0/SD_ILS:1356392025-02-13T14:56:31Z2025-02-13T14:56:31Zby Moreno Díaz, Roberto. editor.<br/><a href="https://doi.org/10.1007/978-3-540-75867-9">https://doi.org/10.1007/978-3-540-75867-9</a><br/>Format: Electronic Resources<br/>Mikrocontroller und Mikroprozessorenent://SD_ILS/0/SD_ILS:1784852025-02-13T14:56:31Z2025-02-13T14:56:31Zby Ungerer, Theo. author.<br/><a href="https://doi.org/10.1007/978-3-540-46819-6">https://doi.org/10.1007/978-3-540-46819-6</a><br/>Format: Electronic Resources<br/>Advances in Computer Systems Architecture 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedingsent://SD_ILS/0/SD_ILS:1695332025-02-13T14:56:31Z2025-02-13T14:56:31Zby Jesshope, Chris. editor.<br/><a href="https://doi.org/10.1007/11859802">https://doi.org/10.1007/11859802</a><br/>Format: Electronic Resources<br/>Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 16th International Workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006, Proceedingsent://SD_ILS/0/SD_ILS:1725932025-02-13T14:56:31Z2025-02-13T14:56:31Zby Vounckx, Johan. editor.<br/><a href="https://doi.org/10.1007/11847083">https://doi.org/10.1007/11847083</a><br/>Format: Electronic Resources<br/>Hybrid Systems: Computation and Control 9th International Workshop, HSCC 2006, Santa Barbara, CA, USA, March 29-31, 2006, Proceedingsent://SD_ILS/0/SD_ILS:1454202025-02-13T14:56:31Z2025-02-13T14:56:31Zby Hespanha, Joao. editor.<br/><a href="https://doi.org/10.1007/11730637">https://doi.org/10.1007/11730637</a><br/>Format: Electronic Resources<br/>High Performance Embedded Architectures and Compilers First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedingsent://SD_ILS/0/SD_ILS:1709202025-02-13T14:56:31Z2025-02-13T14:56:31Zby Conte, Tom. editor.<br/><a href="https://doi.org/10.1007/11587514">https://doi.org/10.1007/11587514</a><br/>Format: Electronic Resources<br/>Hybrid Systems: Computation and Control 8th International Workshop, HSCC 2005, Zurich, Switzerland, March 9-11, 2005, Proceedingsent://SD_ILS/0/SD_ILS:1726682025-02-13T14:56:31Z2025-02-13T14:56:31Zby Morari, Manfred. editor.<br/><a href="https://doi.org/10.1007/b106766">https://doi.org/10.1007/b106766</a><br/>Format: Electronic Resources<br/>Job Scheduling Strategies for Parallel Processing 10th International Workshop, JSSPP 2004, New York, NY, USA, June 13, 2004, Revised Selected Papersent://SD_ILS/0/SD_ILS:1753272025-02-13T14:56:31Z2025-02-13T14:56:31Zby Feitelson, Dror. editor.<br/><a href="https://doi.org/10.1007/b107134">https://doi.org/10.1007/b107134</a><br/>Format: Electronic Resources<br/>Computer Aided Systems Theory - EUROCAST 2005 10th International Conference on Computer Aided Systems Theory, Las Palmas de Gran Canaria, Spain, February 7-11, 2005, Revised Selected Papersent://SD_ILS/0/SD_ILS:1476872025-02-13T14:56:31Z2025-02-13T14:56:31Zby Moreno-Díaz, Roberto. editor.<br/><a href="https://doi.org/10.1007/11556985">https://doi.org/10.1007/11556985</a><br/>Format: Electronic Resources<br/>Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedingsent://SD_ILS/0/SD_ILS:1431572025-02-13T14:56:31Z2025-02-13T14:56:31Zby Paliouras, Vassilis. editor.<br/><a href="https://doi.org/10.1007/11556930">https://doi.org/10.1007/11556930</a><br/>Format: Electronic Resources<br/>Advances in Computer Systems Architecture 10th Asia-Pacific Conference, ACSAC 2005, Singapore, October 24-26, 2005, Proceedingsent://SD_ILS/0/SD_ILS:1422572025-02-13T14:56:31Z2025-02-13T14:56:31Zby Srikanthan, Thambipillai. editor.<br/><a href="https://doi.org/10.1007/11572961">https://doi.org/10.1007/11572961</a><br/>Format: Electronic Resources<br/>Job Scheduling Strategies for Parallel Processing 11th International Workshop, JSSPP 2005, Cambridge, MA, USA, June 19, 2005, Revised Selected Papersent://SD_ILS/0/SD_ILS:1421412025-02-13T14:56:31Z2025-02-13T14:56:31Zby Feitelson, Dror. editor.<br/><a href="https://doi.org/10.1007/11605300">https://doi.org/10.1007/11605300</a><br/>Format: Electronic Resources<br/>